Module core::arch::wasm32 1.33.0[−][src]
Expand description
Platform-specific intrinsics for the wasm32 platform.
This module provides intrinsics specific to the WebAssembly
architecture. Here you’ll find intrinsics specific to WebAssembly that
aren’t otherwise surfaced somewhere in a cross-platform abstraction of
std, and you’ll also find functions for leveraging WebAssembly
proposals such as atomics and simd.
Intrinsics in the wasm32 module are modeled after the WebAssembly
instructions that they represent. Most functions are named after the
instruction they intend to correspond to, and the arguments/results
correspond to the type signature of the instruction itself. Stable
WebAssembly instructions are documented online.
If a proposal is not yet stable in WebAssembly itself then the functions within this function may be unstable and require the nightly channel of Rust to use. As the proposal itself stabilizes the intrinsics in this module should stabilize as well.
See the module documentation for general information
about the arch module and platform intrinsics.
Atomics
The threads proposal for WebAssembly adds a number of
instructions for dealing with multithreaded programs. Most instructions
added in the atomics proposal are exposed in Rust through the
std::sync::atomic module. Some instructions, however, don’t have
direct equivalents in Rust so they’re exposed here instead.
Note that the instructions added in the atomics proposal can work in
either a context with a shared wasm memory and without. These intrinsics
are always available in the standard library, but you likely won’t be
able to use them too productively unless you recompile the standard
library (and all your code) with -Ctarget-feature=+atomics.
It’s also worth pointing out that multi-threaded WebAssembly and its
story in Rust is still in a somewhat “early days” phase as of the time
of this writing. Pieces should mostly work but it generally requires a
good deal of manual setup. At this time it’s not as simple as “just call
std::thread::spawn”, but it will hopefully get there one day!
SIMD
The simd proposal for WebAssembly added a new v128 type for a
128-bit SIMD register. It also added a large array of instructions to
operate on the v128 type to perform data processing. Using SIMD on
wasm is intended to be similar to as you would on x86_64, for example.
You’d write a function such as:
#[cfg(target_arch = "wasm32")] #[target_feature(enable = "simd128")] unsafe fn uses_simd() { use std::arch::wasm32::*; // ... }Run
Unlike x86_64, however, WebAssembly does not currently have dynamic
detection at runtime as to whether SIMD is supported (this is one of the
motivators for the conditional sections and feature
detection proposals, but that is still pretty early days). This means
that your binary will either have SIMD and can only run on engines
which support SIMD, or it will not have SIMD at all. For compatibility
the standard library itself does not use any SIMD internally.
Determining how best to ship your WebAssembly binary with SIMD is
largely left up to you as it can can be pretty nuanced depending on
your situation.
To enable SIMD support at compile time you need to do one of two things:
-
First you can annotate functions with
#[target_feature(enable = "simd128")]. This causes just that one function to have SIMD support available to it, and intrinsics will get inlined as usual in this situation. -
Second you can compile your program with
-Ctarget-feature=+simd128. This compilation flag blanket enables SIMD support for your entire compilation. Note that this does not include the standard library unless you recompile the standard library.
If you enable SIMD via either of these routes then you’ll have a WebAssembly binary that uses SIMD instructions, and you’ll need to ship that accordingly. Also note that if you call SIMD intrinsics but don’t enable SIMD via either of these mechanisms, you’ll still have SIMD generated in your program. This means to generate a binary without SIMD you’ll need to avoid both options above plus calling into any intrinsics in this module.
Structs
WASM-specific 128-bit wide SIMD vector type.
Functions
simd128Materializes a SIMD value from the provided operands.
simd128Calculates the absolute value of each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
simd128Adds pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
simd128Lane-wise rounding to the nearest integral value not smaller than the input.
simd128Converts a 128-bit vector interpreted as four 32-bit signed integers into a 128-bit vector of four 32-bit floating point numbers.
simd128Converts a 128-bit vector interpreted as four 32-bit unsigned integers into a 128-bit vector of four 32-bit floating point numbers.
simd128Conversion of the two double-precision floating point lanes to two lower single-precision lanes of the result. The two higher lanes of the result are initialized to zero. If the conversion result is not representable as a single-precision floating point number, it is rounded to the nearest-even representable number.
simd128Divides pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
simd128Extracts a lane from a 128-bit vector interpreted as 4 packed f32 numbers.
simd128Lane-wise rounding to the nearest integral value not greater than the input.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
simd128Calculates the maximum of pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
simd128Calculates the minimum of pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
simd128Multiplies pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
simd128Lane-wise rounding to the nearest integral value; if two values are equally near, rounds to the even one.
simd128Negates each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
simd128Lane-wise maximum value, defined as a < b ? b : a
simd128Lane-wise minimum value, defined as b < a ? b : a
simd128Replaces a lane from a 128-bit vector interpreted as 4 packed f32 numbers.
simd128Creates a vector with identical lanes.
simd128Calculates the square root of each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
simd128Subtracts pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
simd128Lane-wise rounding to the nearest integral value with the magnitude not larger than the input.
simd128Materializes a SIMD value from the provided operands.
simd128Calculates the absolute value of each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
simd128Adds pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
simd128Lane-wise rounding to the nearest integral value not smaller than the input.
simd128Lane-wise conversion from integer to floating point.
simd128Lane-wise conversion from integer to floating point.
simd128Divides pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
simd128Extracts a lane from a 128-bit vector interpreted as 2 packed f64 numbers.
simd128Lane-wise rounding to the nearest integral value not greater than the input.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
simd128Calculates the maximum of pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
simd128Calculates the minimum of pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
simd128Multiplies pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
simd128Lane-wise rounding to the nearest integral value; if two values are equally near, rounds to the even one.
simd128Negates each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
simd128Lane-wise maximum value, defined as a < b ? b : a
simd128Lane-wise minimum value, defined as b < a ? b : a
simd128Conversion of the two lower single-precision floating point lanes to the two double-precision lanes of the result.
simd128Replaces a lane from a 128-bit vector interpreted as 2 packed f64 numbers.
simd128Creates a vector with identical lanes.
simd128Calculates the square root of each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
simd128Subtracts pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
simd128Lane-wise rounding to the nearest integral value with the magnitude not larger than the input.
simd128Materializes a SIMD value from the provided operands.
simd128Lane-wise wrapping absolute value.
simd128Adds two 128-bit vectors as if they were two packed sixteen 8-bit integers.
simd128Adds two 128-bit vectors as if they were two packed sixteen 8-bit signed
integers, saturating on overflow to i8::MAX.
simd128Returns true if all lanes are nonzero or false if any lane is nonzero.
simd128Extracts the high bit for each lane in a and produce a scalar mask with
all bits concatenated.
simd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
simd128Extracts a lane from a 128-bit vector interpreted as 16 packed i8 numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
simd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
simd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
simd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
simd128Compares lane-wise signed integers, and returns the maximum of each pair.
simd128Compares lane-wise signed integers, and returns the minimum of each pair.
simd128Converts two input vectors into a smaller lane vector by narrowing each lane.
simd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
simd128Negates a 128-bit vectors intepreted as sixteen 8-bit signed integers
simd128Count the number of bits set to one within each lane.
simd128Replaces a lane from a 128-bit vector interpreted as 16 packed i8 numbers.
simd128Shifts each lane to the left by the specified number of bits.
simd128Shifts each lane to the right by the specified number of bits, sign extending.
simd128Returns a new vector with lanes selected from the lanes of the two input
vectors $a and $b specified in the 16 immediate operands.
simd128Creates a vector with identical lanes.
simd128Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit integers.
simd128Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit
signed integers, saturating on overflow to i8::MIN.
simd128Returns a new vector with lanes selected from the lanes of the first input
vector a specified in the second input vector s.
simd128Materializes a SIMD value from the provided operands.
simd128Lane-wise wrapping absolute value.
simd128Adds two 128-bit vectors as if they were two packed eight 16-bit integers.
simd128Adds two 128-bit vectors as if they were two packed eight 16-bit signed
integers, saturating on overflow to i16::MAX.
simd128Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
simd128Extracts the high bit for each lane in a and produce a scalar mask with
all bits concatenated.
simd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
simd128Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs).
simd128Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs).
simd128Converts high half of the smaller lane vector to a larger lane vector, sign extended.
simd128Converts high half of the smaller lane vector to a larger lane vector, zero extended.
simd128Converts low half of the smaller lane vector to a larger lane vector, sign extended.
simd128Converts low half of the smaller lane vector to a larger lane vector, zero extended.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Extracts a lane from a 128-bit vector interpreted as 8 packed i16 numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
simd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
simd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
simd128Load eight 8-bit integers and sign extend each one to a 16-bit lane
simd128Load eight 8-bit integers and zero extend each one to a 16-bit lane
simd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
simd128Compares lane-wise signed integers, and returns the maximum of each pair.
simd128Compares lane-wise signed integers, and returns the minimum of each pair.
simd128Multiplies two 128-bit vectors as if they were two packed eight 16-bit signed integers.
simd128Converts two input vectors into a smaller lane vector by narrowing each lane.
simd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
simd128Negates a 128-bit vectors intepreted as eight 16-bit signed integers
simd128Lane-wise saturating rounding multiplication in Q15 format.
simd128Replaces a lane from a 128-bit vector interpreted as 8 packed i16 numbers.
simd128Shifts each lane to the left by the specified number of bits.
simd128Shifts each lane to the right by the specified number of bits, sign extending.
simd128Same as i8x16_shuffle, except operates as if the inputs were eight
16-bit integers, only taking 8 indices to shuffle.
simd128Creates a vector with identical lanes.
simd128Subtracts two 128-bit vectors as if they were two packed eight 16-bit integers.
simd128Subtracts two 128-bit vectors as if they were two packed eight 16-bit
signed integers, saturating on overflow to i16::MIN.
simd128Materializes a SIMD value from the provided operands.
simd128Lane-wise wrapping absolute value.
simd128Adds two 128-bit vectors as if they were two packed four 32-bit integers.
simd128Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
simd128Extracts the high bit for each lane in a and produce a scalar mask with
all bits concatenated.
simd128Lane-wise multiply signed 16-bit integers in the two input vectors and add adjacent pairs of the full 32-bit results.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
simd128Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs).
simd128Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs).
simd128Converts high half of the smaller lane vector to a larger lane vector, sign extended.
simd128Converts high half of the smaller lane vector to a larger lane vector, zero extended.
simd128Converts low half of the smaller lane vector to a larger lane vector, sign extended.
simd128Converts low half of the smaller lane vector to a larger lane vector, zero extended.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Extracts a lane from a 128-bit vector interpreted as 4 packed i32 numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
simd128Load four 16-bit integers and sign extend each one to a 32-bit lane
simd128Load four 16-bit integers and zero extend each one to a 32-bit lane
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
simd128Compares lane-wise signed integers, and returns the maximum of each pair.
simd128Compares lane-wise signed integers, and returns the minimum of each pair.
simd128Multiplies two 128-bit vectors as if they were two packed four 32-bit signed integers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
simd128Negates a 128-bit vectors intepreted as four 32-bit signed integers
simd128Replaces a lane from a 128-bit vector interpreted as 4 packed i32 numbers.
simd128Shifts each lane to the left by the specified number of bits.
simd128Shifts each lane to the right by the specified number of bits, sign extending.
simd128Same as i8x16_shuffle, except operates as if the inputs were four
32-bit integers, only taking 4 indices to shuffle.
simd128Creates a vector with identical lanes.
simd128Subtracts two 128-bit vectors as if they were two packed four 32-bit integers.
simd128Converts a 128-bit vector interpreted as four 32-bit floating point numbers into a 128-bit vector of four 32-bit signed integers.
simd128Saturating conversion of the two double-precision floating point lanes to
two lower integer lanes using the IEEE convertToIntegerTowardZero
function.
simd128Materializes a SIMD value from the provided operands.
simd128Lane-wise wrapping absolute value.
simd128Adds two 128-bit vectors as if they were two packed two 64-bit integers.
simd128Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
simd128Extracts the high bit for each lane in a and produce a scalar mask with
all bits concatenated.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
simd128Converts high half of the smaller lane vector to a larger lane vector, sign extended.
simd128Converts high half of the smaller lane vector to a larger lane vector, zero extended.
simd128Converts low half of the smaller lane vector to a larger lane vector, sign extended.
simd128Converts low half of the smaller lane vector to a larger lane vector, zero extended.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Extracts a lane from a 128-bit vector interpreted as 2 packed i64 numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
simd128Load two 32-bit integers and sign extend each one to a 64-bit lane
simd128Load two 32-bit integers and zero extend each one to a 64-bit lane
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
simd128Multiplies two 128-bit vectors as if they were two packed two 64-bit integers.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
simd128Negates a 128-bit vectors intepreted as two 64-bit signed integers
simd128Replaces a lane from a 128-bit vector interpreted as 2 packed i64 numbers.
simd128Shifts each lane to the left by the specified number of bits.
simd128Shifts each lane to the right by the specified number of bits, sign extending.
simd128Same as i8x16_shuffle, except operates as if the inputs were two
64-bit integers, only taking 2 indices to shuffle.
simd128Creates a vector with identical lanes.
simd128Subtracts two 128-bit vectors as if they were two packed two 64-bit integers.
Corresponding intrinsic to wasm’s memory.grow instruction
Corresponding intrinsic to wasm’s memory.size instruction
simd128Materializes a SIMD value from the provided operands.
simd128Adds two 128-bit vectors as if they were two packed sixteen 8-bit integers.
simd128Adds two 128-bit vectors as if they were two packed sixteen 8-bit unsigned
integers, saturating on overflow to u8::MAX.
simd128Returns true if all lanes are nonzero or false if any lane is nonzero.
simd128Lane-wise rounding average.
simd128Extracts the high bit for each lane in a and produce a scalar mask with
all bits concatenated.
simd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
simd128Extracts a lane from a 128-bit vector interpreted as 16 packed u8 numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
simd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
simd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
simd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
simd128Compares lane-wise unsigned integers, and returns the maximum of each pair.
simd128Compares lane-wise unsigned integers, and returns the minimum of each pair.
simd128Converts two input vectors into a smaller lane vector by narrowing each lane.
simd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
simd128Count the number of bits set to one within each lane.
simd128Replaces a lane from a 128-bit vector interpreted as 16 packed u8 numbers.
simd128Shifts each lane to the left by the specified number of bits.
simd128Shifts each lane to the right by the specified number of bits, shifting in zeros.
simd128Returns a new vector with lanes selected from the lanes of the two input
vectors $a and $b specified in the 16 immediate operands.
simd128Creates a vector with identical lanes.
simd128Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit integers.
simd128Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit unsigned integers, saturating on overflow to 0.
simd128Returns a new vector with lanes selected from the lanes of the first input
vector a specified in the second input vector s.
simd128Materializes a SIMD value from the provided operands.
simd128Adds two 128-bit vectors as if they were two packed eight 16-bit integers.
simd128Adds two 128-bit vectors as if they were two packed eight 16-bit unsigned
integers, saturating on overflow to u16::MAX.
simd128Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
simd128Lane-wise rounding average.
simd128Extracts the high bit for each lane in a and produce a scalar mask with
all bits concatenated.
simd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
simd128Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs).
simd128Converts high half of the smaller lane vector to a larger lane vector, zero extended.
simd128Converts low half of the smaller lane vector to a larger lane vector, zero extended.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Extracts a lane from a 128-bit vector interpreted as 8 packed u16 numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
simd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
simd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
simd128Load eight 8-bit integers and zero extend each one to a 16-bit lane
simd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
simd128Compares lane-wise unsigned integers, and returns the maximum of each pair.
simd128Compares lane-wise unsigned integers, and returns the minimum of each pair.
simd128Multiplies two 128-bit vectors as if they were two packed eight 16-bit signed integers.
simd128Converts two input vectors into a smaller lane vector by narrowing each lane.
simd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
simd128Replaces a lane from a 128-bit vector interpreted as 8 packed u16 numbers.
simd128Shifts each lane to the left by the specified number of bits.
simd128Shifts each lane to the right by the specified number of bits, shifting in zeros.
simd128Same as i8x16_shuffle, except operates as if the inputs were eight
16-bit integers, only taking 8 indices to shuffle.
simd128Creates a vector with identical lanes.
simd128Subtracts two 128-bit vectors as if they were two packed eight 16-bit integers.
simd128Subtracts two 128-bit vectors as if they were two packed eight 16-bit unsigned integers, saturating on overflow to 0.
simd128Materializes a SIMD value from the provided operands.
simd128Adds two 128-bit vectors as if they were two packed four 32-bit integers.
simd128Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
simd128Extracts the high bit for each lane in a and produce a scalar mask with
all bits concatenated.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
simd128Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs).
simd128Converts high half of the smaller lane vector to a larger lane vector, zero extended.
simd128Converts low half of the smaller lane vector to a larger lane vector, zero extended.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Extracts a lane from a 128-bit vector interpreted as 4 packed u32 numbers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
simd128Load four 16-bit integers and zero extend each one to a 32-bit lane
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
simd128Compares lane-wise unsigned integers, and returns the maximum of each pair.
simd128Compares lane-wise unsigned integers, and returns the minimum of each pair.
simd128Multiplies two 128-bit vectors as if they were two packed four 32-bit signed integers.
simd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
simd128Replaces a lane from a 128-bit vector interpreted as 4 packed u32 numbers.
simd128Shifts each lane to the left by the specified number of bits.
simd128Shifts each lane to the right by the specified number of bits, shifting in zeros.
simd128Same as i8x16_shuffle, except operates as if the inputs were four
32-bit integers, only taking 4 indices to shuffle.
simd128Creates a vector with identical lanes.
simd128Subtracts two 128-bit vectors as if they were two packed four 32-bit integers.
simd128Converts a 128-bit vector interpreted as four 32-bit floating point numbers into a 128-bit vector of four 32-bit unsigned integers.
simd128Saturating conversion of the two double-precision floating point lanes to
two lower integer lanes using the IEEE convertToIntegerTowardZero
function.
simd128Materializes a SIMD value from the provided operands.
simd128Adds two 128-bit vectors as if they were two packed two 64-bit integers.
simd128Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
simd128Extracts the high bit for each lane in a and produce a scalar mask with
all bits concatenated.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
simd128Converts high half of the smaller lane vector to a larger lane vector, zero extended.
simd128Converts low half of the smaller lane vector to a larger lane vector, zero extended.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
simd128Extracts a lane from a 128-bit vector interpreted as 2 packed u64 numbers.
simd128Load two 32-bit integers and zero extend each one to a 64-bit lane
simd128Multiplies two 128-bit vectors as if they were two packed two 64-bit integers.
simd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
simd128Replaces a lane from a 128-bit vector interpreted as 2 packed u64 numbers.
simd128Shifts each lane to the left by the specified number of bits.
simd128Shifts each lane to the right by the specified number of bits, shifting in zeros.
simd128Same as i8x16_shuffle, except operates as if the inputs were two
64-bit integers, only taking 2 indices to shuffle.
simd128Creates a vector with identical lanes.
simd128Subtracts two 128-bit vectors as if they were two packed two 64-bit integers.
Generates the trap instruction UNREACHABLE
simd128Performs a bitwise and of the two input 128-bit vectors, returning the resulting vector.
simd128Bitwise AND of bits of a and the logical inverse of bits of b.
simd128Returns true if any bit in a is set, or false otherwise.
simd128Use the bitmask in c to select bits from v1 when 1 and v2 when 0.
simd128Loads a v128 vector from the given heap address.
simd128Loads an 8-bit value from m and sets lane L of v to that value.
simd128Load a single element and splat to all lanes of a v128 vector.
simd128Loads a 16-bit value from m and sets lane L of v to that value.
simd128Load a single element and splat to all lanes of a v128 vector.
simd128Loads a 32-bit value from m and sets lane L of v to that value.
simd128Load a single element and splat to all lanes of a v128 vector.
simd128Load a 32-bit element into the low bits of the vector and sets all other bits to zero.
simd128Loads a 64-bit value from m and sets lane L of v to that value.
simd128Load a single element and splat to all lanes of a v128 vector.
simd128Load a 64-bit element into the low bits of the vector and sets all other bits to zero.
simd128Flips each bit of the 128-bit input vector.
simd128Performs a bitwise or of the two input 128-bit vectors, returning the resulting vector.
simd128Stores a v128 vector to the given heap address.
simd128Stores the 8-bit value from lane L of v into m
simd128Stores the 16-bit value from lane L of v into m
simd128Stores the 32-bit value from lane L of v into m
simd128Stores the 64-bit value from lane L of v into m
simd128Performs a bitwise xor of the two input 128-bit vectors, returning the resulting vector.