# [−][src]Function core::arch::mips::__msa_sra_d

    pub unsafe fn __msa_sra_d(a: v2i64, b: v2i64) -> v2i64

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS and target feature `msa` only.

Vector Shift Right Arithmetic

The elements in vector `a` (two signed 64-bit integer numbers) are shifted right arithmetic by the number of bits the elements in vector `b` (two signed 64-bit integer numbers) specify modulo the size of the element in bits.The result is written to vector (two signed 64-bit integer numbers).