# [−][src]Function core::arch::mips64::__msa_aver_s_b

    pub unsafe fn __msa_aver_s_b(a: v16i8, b: v16i8) -> v16i8

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS-64 and target feature `msa` only.

Vector Signed Average Rounded

The elements in vector `a` (sixteen signed 8-bit integer numbers) are added to the elements in vector `b` (sixteen signed 8-bit integer numbers). The addition of the elements plus 1 (for rounding) is done signed with full precision, i.e. the result has one extra bit. Signed division by 2 (or arithmetic shift right by one bit) is performed before writing the result to vector (sixteen signed 8-bit integer numbers).