# [−][src]Function core::arch::mips::__msa_srlri_h

    pub unsafe fn __msa_srlri_h(a: v8i16, imm4: i32) -> v8i16

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS and target feature `msa` only.

Immediate Shift Right Logical Rounded

The elements in vector `a` (eight signed 16-bit integer numbers) are shifted right logical by `imm6` bits.The most significant discarded bit is added to the shifted value (for rounding) and the result is written to vector (eight signed 16-bit integer numbers).