# [−][src]Function core::arch::mips64::__msa_fexp2_d

    pub unsafe fn __msa_fexp2_d(a: v2f64, b: v2i64) -> v2f64

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS-64 and target feature `msa` only.

Vector Floating-Point Down-Convert Interchange Format

The floating-point elements in vector `a` (two 64-bit floating point numbers) are scaled, i.e. multiplied, by 2 to the power of integer elements in vector `b` (two signed 64-bit integer numbers). The result is written to vector (two 64-bit floating point numbers).