# [−][src]Function core::arch::mips::__msa_ffqr_d

    pub unsafe fn __msa_ffqr_d(a: v4i32) -> v2f64

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS and target feature `msa` only.

Vector Floating-Point Convert from Fixed-Point Left

The right half fixed-point elements in vector `a` (four signed 32-bit integer numbers) are up-converted to floating-point data format. i.e. from 16-bit Q15 to 32-bit floating-point, or from 32-bit Q31 to 64-bit floating-point. The result is written to vector (two 64-bit floating point numbers).