# [−][src]Function core::arch::mips64::__msa_sra_b

    pub unsafe fn __msa_sra_b(a: v16i8, b: v16i8) -> v16i8

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS-64 and target feature `msa` only.

Vector Shift Right Arithmetic

The elements in vector `a` (sixteen signed 8-bit integer numbers) are shifted right arithmetic by the number of bits the elements in vector `b` (sixteen signed 8-bit integer numbers) specify modulo the size of the element in bits.The result is written to vector (sixteen signed 8-bit integer numbers).