# [−][src]Function core::arch::mips64::__msa_bnegi_w

    pub unsafe fn __msa_bnegi_w(a: v4u32, imm5: i32) -> v4u32

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS-64 and target feature `msa` only.

Immediate Bit Negate

Negate (complement) one bit in each element of vector `a` (four unsigned 32-bit integer numbers). The bit position is given by immediate `imm5` modulo the size of the element in bits. The result is written to vector (four unsigned 32-bit integer numbers).