# [−][src]Function core::arch::mips64::__msa_addv_h

    pub unsafe fn __msa_addv_h(a: v8i16, b: v8i16) -> v8i16

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS-64 and target feature `msa` only.

Vector Add

The elements in vector in `a` (eight signed 16-bit integer numbers) are added to the elements in vector `b` (eight signed 16-bit integer numbers). The result is written to vector (eight signed 16-bit integer numbers).