# [−][src]Function core::arch::mips::__msa_andi_b

    pub unsafe fn __msa_andi_b(a: v16u8, imm8: i32) -> v16u8

🔬 This is a nightly-only experimental API. (`stdsimd` #48556)
This is supported on MIPS and target feature `msa` only.

Immediate Logical And

Each byte element of vector `a` (sixteen unsigned 8-bit integer numbers) is combined with the 8-bit immediate i8 (signed 8-bit integer number) in a bitwise logical AND operation. The result is written to vector (sixteen unsigned 8-bit integer numbers).